Varman, Peter J.2013-03-082013-03-082012Du, Kai. "High Performance Reliable Variable Latency Carry Select Addition." (2012) Master’s Thesis, Rice University. <a href="https://hdl.handle.net/1911/70231">https://hdl.handle.net/1911/70231</a>.https://hdl.handle.net/1911/70231This thesis describes the design and the optimization of a low overhead, high performance variable latency carry select adder. Previous researchers believed that the traditional adder has reached the theoretical speed bound. However, a considerable portion of hardware resources of the traditional adder is only used in the worst case. Based on this observation, variable latency adders have been proposed to improve on the theoretical limit, but such adders incur significant area overhead. By combining previous variable latency adders with carry select addition, this work describes a novel variable latency carry select adder. Applying carry select addition in the variable latency adder design significantly reduces the area overhead and increases its performance. This variable latency adder is faster and smaller than previous variable latency adders. Furthermore, this variable latency adder can be optimized to be faster and smaller than the fastest adder generated by the Synopsys DesignWare building block IP.62 p.application/pdfengCopyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.Applied sciencesElectrical engineeringThesisDuKTHESIS E.E. 2012 DU