Rajagopal, SridharRixner, ScottCavallaro, Joseph R.Aazhang, Behnaam2007-10-312007-10-312002-08-202002-08-12S. Rajagopal, S. Rixner, J. R. Cavallaro and B. Aazhang, "DSP architectural considerations for optimal baseband processing," <i>Texas Instruments TMS320 Educators Conference,</i> 2002.https://hdl.handle.net/1911/20232PresentationThe data rate requirements for future wireless systems has increased by orders-of-magnitude (from Kbps to several Mbps), requiring more sophisticated algorithms for their implementation. This tutorial will explore different architectural issues to consider for optimal wireless baseband processing. It will look at research into real-time architectural design issues such as number of functional units, data access from memory and sequential traceback for Viterbi decoding using digital signal processorsengDSPbaseband architecturesPresentationDSPbaseband architectures