<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-20T16:15:03Z</responseDate><request verb="GetRecord" identifier="oai:repository.rice.edu:1911/104449" metadataPrefix="dim">https://repository.rice.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:repository.rice.edu:1911/104449</identifier><datestamp>2024-01-11T20:58:36Z</datestamp><setSpec>com_1911_8299</setSpec><setSpec>col_1911_13110</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor">Rusk, Sigsby K.</dim:field>
   <dim:field mdschema="dc" element="creator">Schlaile, Gottfried Timothy</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2018-12-18T21:23:17Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2018-12-18T21:23:17Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued">1973</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="citation">Schlaile, Gottfried Timothy. &amp;quot;Digital logic simulator with application to an asynchronous control module.&amp;quot; (1973) Master’s Thesis,  Rice University.  &amp;lt;a href=&amp;quot;https://hdl.handle.net/1911/104449&amp;quot;&amp;gt;https://hdl.handle.net/1911/104449&amp;lt;/a&amp;gt;.</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">https://hdl.handle.net/1911/104449</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="digital">RICE2084</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="callno">THESIS E.E. 1973 SCHLAILE</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract">The digital logic simulator contains an assortment of most commonly needed logic functions for designing small logic systems. The simulator is designed and constructed to conveniently implement ideas in logic system design and rapidly test changes. The problem designed and simulated on the logic simulator is an asynchronous control system typical of those used to control the access to a computer memory of two independent processors.</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent">35 pp</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="digitalOrigin">reformatted digital</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso">eng</dim:field>
   <dim:field mdschema="dc" element="rights">Copyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.</dim:field>
   <dim:field mdschema="dc" element="title">Digital logic simulator with application to an asynchronous control module</dim:field>
   <dim:field mdschema="dc" element="type">Thesis</dim:field>
   <dim:field mdschema="dc" element="type" qualifier="material">Text</dim:field>
   <dim:field mdschema="thesis" element="degree" qualifier="department">Electrical Engineering</dim:field>
   <dim:field mdschema="thesis" element="degree" qualifier="discipline">Engineering</dim:field>
   <dim:field mdschema="thesis" element="degree" qualifier="grantor">Rice University</dim:field>
   <dim:field mdschema="thesis" element="degree" qualifier="level">Masters</dim:field>
   <dim:field mdschema="thesis" element="degree" qualifier="name">Master of Science</dim:field>
   <dim:field mdschema="others" element="access-status">open.access</dim:field>
</dim:dim>
</metadata></record></GetRecord></OAI-PMH>